Responsibilities:

Our client is seeking talented and motivated individuals to tackle challenging engineering problems in advanced digital IC design. As a Principal Digital ASIC Designer, you will be responsible for designing high-performance digital ASICs in advanced technologies-14nm FinFET, 22FDX, etc. You will be responsible for implementing designs from RTL through synthesis, scan insertion, timing closure, implementation and layout. You will work in multi-disciplinary teams with opportunities to learn, grow and contribute to a variety of projects in different application areas.

Applicants should possess solid skills in back-end digital systems design with experience in design flows from Cadence or Synopsys, and a working knowledge of analog design principles and signal / power integrity. Familiarity with architectures for secure systems design, e.g., cryptographic encoders / decoders or tagged processor architectures is a plus. Demonstrated experience with successful tapeouts at advanced nodes is required. Experience leading and managing design teams is also required.

Specific Responsibilities:

• Defining and implementing design flows
• Leading design and implementation teams
• Synthesis, P&R, and timing closure
• DFT insertion
• Implement clock and reset nets
• Integrate third-party IP
• Top-level chip integration
• Detailed analysis design and capture

Qualifications:

Required Qualifications:

• PhD+10 or MSEE+15 years experience preferred
• Strong analysis and problem solving skills
• Fluent in Verilog/VHDL
• Fluent in Cadence or equivalent Digital ASIC Tool Suite, e.g., Genus, Innovus, Tempus, Voltus, etc.
• Experience with high-level design, simulation, and verification tools
• Experience with scripting languages Python/PERL and regular expressions
• Ability to acquire and maintain a security clearance

Desired Qualifications:

• Experience with Linux/UNIX OS, piping, batching, etc.
• Experience with SRAM compilers and architecture tradespace
• Familiarity with memory design for SRAM, DRAM, and NVRAM
• Familiarity with SOC tradespace including processor selection, memory and bus implementation and architecture
• Familiarity with hardware security, e.g., encryption, key management, TRNG/DRNG, PUFs, root-of-trust, design obfuscation, etc.
• Familiarity with analog ASICs: Voltage and Current sources, Amplifiers, Converters, PLLs, and Transceivers
• Active security clearance

Applicants selected for this position will be required to obtain and maintain a U.S. Security Clearance.